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0001-linux-4.6-drm-i915-psr.patch

@@ -1,115 +0,0 @@
-From 03b7b5f983091bca17e9c163832fcde56971d7d1 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 18 May 2016 18:47:11 +0200
-Subject: drm/i915/psr: Try to program link training times correctly
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The default of 0 is 500us of link training, but that's not enough for
-some platforms. Decoding this correctly means we're using 2.5ms of
-link training on these platforms, which fixes flickering issues
-associated with enabling PSR.
-
-v2: Unbotch the math a bit.
-
-v3: Drop debug hunk.
-
-v4: Improve commit message.
-
-Tested-by: Lyude <cpaul@redhat.com>
-Cc: Lyude <cpaul@redhat.com>
-Cc: stable@vger.kernel.org
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95176
-Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
-Cc: Sonika Jindal <sonika.jindal@intel.com>
-Cc: Durgadoss R <durgadoss.r@intel.com>
-Cc: "Pandiyan, Dhinakaran" <dhinakaran.pandiyan@intel.com>
-Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Tested-by: fritsch@kodi.tv
-Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
-Link: http://patchwork.freedesktop.org/patch/msgid/1463590036-17824-2-git-send-email-daniel.vetter@ffwll.ch
-(cherry picked from commit 50db139018f9c94376d5f4db94a3bae65fdfac14)
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
----
- drivers/gpu/drm/i915/intel_psr.c | 55 ++++++++++++++++++++++++++++++++++------
- 1 file changed, 47 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
-index c3abae4..a788d1e 100644
---- a/drivers/gpu/drm/i915/intel_psr.c
-+++ b/drivers/gpu/drm/i915/intel_psr.c
-@@ -280,7 +280,10 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp)
- 	 * with the 5 or 6 idle patterns.
- 	 */
- 	uint32_t idle_frames = max(6, dev_priv->vbt.psr.idle_frames);
--	uint32_t val = 0x0;
-+	uint32_t val = EDP_PSR_ENABLE;
-+
-+	val |= max_sleep_time << EDP_PSR_MAX_SLEEP_TIME_SHIFT;
-+	val |= idle_frames << EDP_PSR_IDLE_FRAME_SHIFT;
- 
- 	if (IS_HASWELL(dev))
- 		val |= EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES;
-@@ -288,14 +291,50 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp)
- 	if (dev_priv->psr.link_standby)
- 		val |= EDP_PSR_LINK_STANDBY;
- 
--	I915_WRITE(EDP_PSR_CTL, val |
--		   max_sleep_time << EDP_PSR_MAX_SLEEP_TIME_SHIFT |
--		   idle_frames << EDP_PSR_IDLE_FRAME_SHIFT |
--		   EDP_PSR_ENABLE);
-+	if (dev_priv->vbt.psr.tp1_wakeup_time > 5)
-+		val |= EDP_PSR_TP1_TIME_2500us;
-+	else if (dev_priv->vbt.psr.tp1_wakeup_time > 1)
-+		val |= EDP_PSR_TP1_TIME_500us;
-+	else if (dev_priv->vbt.psr.tp1_wakeup_time > 0)
-+		val |= EDP_PSR_TP1_TIME_100us;
-+	else
-+		val |= EDP_PSR_TP1_TIME_0us;
-+
-+	if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 5)
-+		val |= EDP_PSR_TP2_TP3_TIME_2500us;
-+	else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 1)
-+		val |= EDP_PSR_TP2_TP3_TIME_500us;
-+	else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 0)
-+		val |= EDP_PSR_TP2_TP3_TIME_100us;
-+	else
-+		val |= EDP_PSR_TP2_TP3_TIME_0us;
-+
-+	if (intel_dp_source_supports_hbr2(intel_dp) &&
-+	    drm_dp_tps3_supported(intel_dp->dpcd))
-+		val |= EDP_PSR_TP1_TP3_SEL;
-+	else
-+		val |= EDP_PSR_TP1_TP2_SEL;
-+
-+	I915_WRITE(EDP_PSR_CTL, val);
-+
-+	if (!dev_priv->psr.psr2_support)
-+		return;
-+
-+	/* FIXME: selective update is probably totally broken because it doesn't
-+	 * mesh at all with our frontbuffer tracking. And the hw alone isn't
-+	 * good enough. */
-+	val = EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE;
-+
-+	if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 5)
-+		val |= EDP_PSR2_TP2_TIME_2500;
-+	else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 1)
-+		val |= EDP_PSR2_TP2_TIME_500;
-+	else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 0)
-+		val |= EDP_PSR2_TP2_TIME_100;
-+	else
-+		val |= EDP_PSR2_TP2_TIME_50;
- 
--	if (dev_priv->psr.psr2_support)
--		I915_WRITE(EDP_PSR2_CTL, EDP_PSR2_ENABLE |
--				EDP_SU_TRACK_ENABLE | EDP_PSR2_TP2_TIME_100);
-+	I915_WRITE(EDP_PSR2_CTL, val);
- }
- 
- static bool intel_psr_match_conditions(struct intel_dp *intel_dp)
--- 
-cgit v0.12
-

PKGBUILD

@@ -4,8 +4,8 @@
 pkgbase=linux               # Build stock -ARCH kernel
 #pkgbase=linux-custom       # Build kernel with a different name
 _srcname=linux-4.6
-pkgver=4.6.1
+pkgver=4.6.2
-pkgrel=2
+pkgrel=1
 arch=('i686' 'x86_64')
 url="http://www.kernel.org/"
 license=('GPL2')
@@ -20,18 +20,16 @@ source=("https://www.kernel.org/pub/linux/kernel/v4.x/${_srcname}.tar.xz"
         # standard config files for mkinitcpio ramdisk
         'linux.preset'
         'change-default-console-loglevel.patch'
-        '0001-linux-4.6-drm-i915-psr.patch'
         '0001-linux-4.6-rtlwifi-fix-atomic.patch')
 
 sha256sums=('a93771cd5a8ad27798f22e9240538dfea48d3a2bf2a6a6ab415de3f02d25d866'
             'SKIP'
-            '023d192ebb487657ce24cbd758c8a6cfcb66a26c61b4e0f2395528953c45da9b'
+            '0dc509a19c68ab547a62158bf2017965b843854b63be46ae039c37724dccca21'
             'SKIP'
             '02e8b02e8cd10aa059917a489a9663e7f66bdf12c5ae8a1e0369bb2862da6b68'
             'd59014b8f887c6aa9488ef5ff9bc5d4357850a979f3ff90a2999bbe24e5c6e15'
             'f0d90e756f14533ee67afda280500511a62465b4f76adcc5effa95a40045179c'
             '1256b241cd477b265a3c2d64bdc19ffe3c9bbcee82ea3994c590c2c76e767d99'
-            'b719c3bd58d71a9e0d76b3674e854419ebec4a3fa9f8a4823f23639720527e83'
             'ae0d16e81a915fae130125ba9d0b6fd2427e06f50b8b9514abc4029efe61ee98')
 validpgpkeys=(
               'ABAF11C65A2970B130ABE3C479BE3E4300411886' # Linus Torvalds
@@ -54,10 +52,6 @@ prepare() {
   # (relevant patch sent upstream: https://lkml.org/lkml/2011/7/26/227)
   patch -p1 -i "${srcdir}/change-default-console-loglevel.patch"
 
-  # fix flickering on 4.6
-  # reported from brain0 and heftig on IRC
-  patch -p1 -i "${srcdir}/0001-linux-4.6-drm-i915-psr.patch"
-
   # fix rtlwifi atomic
   # https://bugs.archlinux.org/task/49401
   patch -p1 -i "${srcdir}/0001-linux-4.6-rtlwifi-fix-atomic.patch"