56 lines
2.0 KiB
Diff
56 lines
2.0 KiB
Diff
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commit 389a55581e30607af0fcde6cdb4e54f189cf46cf
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Author: Chris Wilson <chris@chris-wilson.co.uk>
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Date: Tue Nov 29 15:12:16 2011 +0000
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drm/i915: Only clear the GPU domains upon a successful finish
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By clearing the GPU read domains before waiting upon the buffer, we run
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the risk of the wait being interrupted and the domains prematurely
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cleared. The next time we attempt to wait upon the buffer (after
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userspace handles the signal), we believe that the buffer is idle and so
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skip the wait.
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There are a number of bugs across all generations which show signs of an
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overly haste reuse of active buffers.
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Such as:
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https://bugs.freedesktop.org/show_bug.cgi?id=29046
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https://bugs.freedesktop.org/show_bug.cgi?id=35863
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https://bugs.freedesktop.org/show_bug.cgi?id=38952
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https://bugs.freedesktop.org/show_bug.cgi?id=40282
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https://bugs.freedesktop.org/show_bug.cgi?id=41098
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https://bugs.freedesktop.org/show_bug.cgi?id=41102
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https://bugs.freedesktop.org/show_bug.cgi?id=41284
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https://bugs.freedesktop.org/show_bug.cgi?id=42141
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A couple of those pre-date i915_gem_object_finish_gpu(), so may be
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unrelated (such as a wild write from a userspace command buffer), but
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this does look like a convincing cause for most of those bugs.
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Cc: stable@kernel.org
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Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
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diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
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index d560175..036bc58 100644
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--- a/drivers/gpu/drm/i915/i915_gem.c
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+++ b/drivers/gpu/drm/i915/i915_gem.c
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@@ -3087,10 +3087,13 @@ i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj)
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return ret;
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}
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+ ret = i915_gem_object_wait_rendering(obj);
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+ if (ret)
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+ return ret;
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+
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/* Ensure that we invalidate the GPU's caches and TLBs. */
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obj->base.read_domains &= ~I915_GEM_GPU_DOMAINS;
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-
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- return i915_gem_object_wait_rendering(obj);
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+ return 0;
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}
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/**
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